(a) Field of the Invention p The present invention relates to a horizontal deflection apparatus. More specifically, the present invention relates to an apparatus for controlling a drive transistor of a horizontal deflection apparatus to reduce switching loss of the drive transistor.
(b) Description of the Related Art
A horizontal deflection apparatus uses horizontal synchronization signals and synchronization to generate sawtooth waves of 15.75 KHz, and provides the sawtooth waves to a horizontal deflection coil in order to scan electron beams of television cathode ray tubes (CRT) or computer monitors in the horizontal direction.
FIG. 1 is a circuit diagram illustrating a conventional horizontal deflection apparatus, and FIG. 2 is a waveform diagram of an equivalent circuit of a controller of a drive transistor. A controller 100 of the drive transistor Q2 is an equivalent circuit of a pulse transformer for providing a base current for the drive transistor Q2.
As shown in FIG. 1, a drive signal to operate a switch Q1 is provided to the switch Q1 from an internal microprocessor. When the switch Q1 is turned on, an inductor current i.sub.LB is increased with the passage of time at a slope of V.sub.B /L.sub.B as shown in FIG. 2 since this circuit adopts a forward converter method. Since carriers in the base layer move in the negative direction, the drive transistor Q2 is turned off according to a base current i.sub.B2 of the drive transistor Q2, and energy is stored in an inductor L.sub.B. At this time, when the carriers in the base layer are removed, the base current i.sub.B2 of the drive transistor Q2 goes into a completely off state, and the base current i.sub.B2 of the drive transistor Q2 becomes zero.
When the switch Q1 is turned off, the inductor current i.sub.LB flows through the base of the drive transistor Q2 in a state decreasing with the passage of time (i.e., at a negative slope) because of the time delay of the inductor L.sub.B. Therefore, the drive transistor is turned on. At this time, after the base current i.sub.B2 of the drive transistor Q2 is provided at a maximum value, the base current i.sub.B2 is then gradually reduced but continuously maintained in an on state.
When the controller 100 of the drive transistor is operated as above, a resonance switch 110 of the horizontal deflection apparatus operates in four operation modes in an equivalent circuit such as that shown in FIG. 3. Waveforms in the four operation modes are shown in FIG. 4.
FIG. 3(a) shows a first operation mode of the resonance switch 110.
In the first operation mode, the drive transistor Q2 is turned on so that a resonance is not generated, and an inductor current i.sub.Ly of a yoke coil L.sub.y is increased from a point t0 to a point t2 in FIG. 4. It is assumed that the current i.sub.Ly flowing through the yoke coil L.sub.y flows through a diode D2 coupled to the drive transistor Q2 in parallel, and that the drive transistor Q2 is turned off.
As shown in FIG. 4, when the diode D2 is turned on at the point t0 and a diode current i.sub.D2 flows, a voltage between a collector and emitter of the drive transistor Q2 becomes zero, and a capacitor Cx in FIG. 1 is charged to generate a capacitor voltage Vx. Therefore, when the drive transistor Q2 is turned on at a zero voltage point t1 (i.e., when the switch Q1 is turned off), a switching loss of the drive transistor Q2 is very low because the switching operation is performed in a zero voltage state.
FIG. 3(b) shows a second operation mode of the resonance switch 110.
As shown, the second operation mode of the resonance switch 110 is performed between the interval t2 and t3. Since the capacitor voltage Vx is provided, the diode D2 is turned off and the current i.sub.Ly of the yoke inductor L.sub.y is increased from a negative direction to a positive direction, and a collector current i.sub.C2 starts to gradually flow through the drive transistor Q2.
At this time, as shown in FIG. 4, a base current i.sub.B2 of the drive transistor Q2 is reduced from a very high value to a very low value in a zero voltage switching state because of a time delay of the inductor L.sub.B in FIG. 1. On the other hand, a collector current i.sub.C2 of the drive transistor Q2 is gradually increased because of the yoke inductor L.sub.y. In the waveform of the base current i.sub.B2 of FIG. 4, a current I.sub.BF represents a forward bias current to drive the drive transistor Q2, and a current I.sub.BR represents a reverse bias current to stop the drive transistor Q2.
The collector circuit i.sub.C2 gradually increases up to a maximum value I.sub.CP, and when the current I.sub.Ly flowing to the yoke coil L.sub.y reaches a maximum value I.sub.LP, the second operation mode stops.
FIG. 3(c) shows a third operation mode of the resonance switch 110.
As shown, the third operation mode of the resonance switch 110, which is performed between an interval t3 and t4 of FIG. 4, starts when the switch Q1 is turned on, that is, when the drive transistor Q2 is turned off. When the drive transistor Q2 is turned off, the collector current i.sub.C2 flowing through the drive transistor Q2 is reduced, and the yoke coil current i.sub.Ly flows through a capacitor Cy coupled to the drive transistor Q2 in parallel.
Therefore, as the capacitor Cy is charged, the voltage at the capacitor Cy steeply increases in a sine wave form, the voltage V.sub.CE2 also increases as a sine wave, and the collector current i.sub.C2 flowing through the drive transistor Q2 steeply reduces. When a drive status is not maximized in this state, that is, if even a small collector current i.sub.C2 flows, subsequent switching loss occurs.
The capacitor Cy is discharged by a serial resonance of the yoke coil Ly and the capacitor Cy, and the voltage at the capacitor Cy reduces in a sine wave form.
FIG. 3(d) shows a fourth operation mode of the resonance switch 110.
As shown, the fourth operation mode of the resonance switch 110 is performed after an interval t4 of FIG. 4. When the current is discharged from the capacitor Cy and the voltage at the capacitor Cy becomes negative, the diode D2 coupled to the capacitor Cy in parallel is turned on to complete the fourth operation mode, and the yoke coil current i.sub.Ly flows through the diode D2, after which the mode returns to the first operation mode.
Characteristics of the switching loss in the vicinity of the point t3 will now be described in detail.
FIG. 5(a) is a diagram illustrating a switching loss under first base driving conditions during operation of a conventional horizontal deflection device, in which a horizontal deflection frequency is not changed but a magnitude of a base current is changed. Here, the solid lines represent reference base driving conditions, and the dotted lines represent the first base driving conditions.
As shown, when the base current i.sub.B2 is reduced from the forward bias base current I.sub.BF to the reverse bias base current I.sub.BR under the reference base driving conditions of the drive transistor Q2, a voltage V.sub.CE2 between the collector and emitter, and the collector voltage i.sub.C2 of the drive transistor Q2 are represented by the solid lines around and after the point t3.
When the reverse bias current I.sub.BR is not sufficiently small after the point t3, an off switching operation of the drive transistor Q2 is not performed quickly so that the collector current i.sub.C2 continues to flow. At this time, since the voltage VCE2 steeply increases at the point t3, switching loss of the drive transistor Q2 occurs.
To prevent this energy loss, when the forward bias base current I'.sub.BF and the reverse bias base current I'.sub.BR are reduced according to the first base driving conditions as shown by dotted lines in FIG. 5(a), the voltage V'.sub.CE2 is increased since the forward bias base current I'.sub.BF for turning on the drive transistor Q2 is small. At this time, the collector current I'C2 is increased to a maximum value before the point t3, thereby resulting in the generation of switching loss.
FIG. 5(b) is a diagram illustrating switching loss under second base driving conditions during operation of a conventional horizontal deflection apparatus. As in FIG. 5(a), the horizontal deflection frequency is not charged but the magnitude of the base current is changed. Here, the solid lines represent reference base driving conditions, and the dotted lines represent the second base driving conditions.
Assuming that, under the second base driving conditions, the forward bias base current I'.sub.BF is greater than I.sub.BF, and the reverse bias base current I'.sub.BR is less than I.sub.BR, since the forward bias base current I'.sub.BF is sufficient to turn on the drive transistor Q2, the voltage V'.sub.CE2 between the collector and emitter is reduced to nearly zero. However, since the base current I'.sub.B2 is greatly reduced before the point t3, the voltage V'.sub.CE2 between the collector and emitter is substantially increased. Therefore, since the collector current I'.sub.C2 in the vicinity of the point t3 is at a maximum, the switching loss is increased.
Therefore, the reverse bias base current I.sub.BR of the controller 100 of the drive transistor Q2 is optimized to suit the characteristics of television sets or monitors. However, since the horizontal deflection frequency of the monitors must be modified to adjust the resolution of the monitors, optimization is very difficult.
FIG. 6(a) is a waveform of the reverse bias base current when the horizontal deflection frequency is changed to a higher frequency.
As shown, when changes in the resolution of the monitor increases the horizontal deflection frequency to therefore change the point where the base current i.sub.B becomes zero (i.e., from the point t3 to t'3), the reverse bias base current I.sub.BR at the point t3 increases to I'.sub.BR at the point t'3.
Therefore, when the reverse bias base current increases over that required to turn off the drive transistor Q2, the drive transistor Q2 is not completely turned off, and switching loss occurs at the point t'3 as a result of the maximum collector current and also the voltage between the collector and emitter.
FIG. 6(b) is a waveform of the forward bias base current when the horizontal deflection frequency is changed to a smaller frequency.
As shown, when changes in the resolution of the monitor decreases the horizontal deflection frequency to therefore change the point where the base current i.sub.B becomes zero (i.e., from the point t3 to t'3), the reverse bias base current I.sub.BR at the point t3 decreases to I'.sub.BR at the point t'3.
Therefore, when the reverse bias base current decreases below that required to turn off the drive transistor Q2, the moment at which the drive transistor Q2 is turned off becomes point t3, which is earlier than the point t'3 at which the base current becomes completely zero. Accordingly, the voltage between the collector and emitter increases before the point t'3 so that switching loss occurs.
Hence, the drive transistor Q2 experiences almost no switching loss through use of zero voltage switching. However, when the drive transistor Q2 is turned off, very heavy switching loss repeatedly occurs. This is particularly the case when the horizontal deflection frequency is changed to adjust the resolution of the monitor.
In case of controlling the drive transistor of the horizontal deflection apparatus such that the horizontal deflection frequency of a color television is uniform or the horizontal deflection frequency of a computer monitor is varied, much heat is generated in the power switching elements when using the conventional methods. To solve this problem, elements having greater current and voltage capacities, or a heat sink are used. However, both of these methods increase overall costs, particularly the use of the heat sink. Also, reliability is not ensured with the use of the heat sink.